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by Samir Palnitkar
- Language: english
- Release date: March 3, 2003
- Format: paperback, 496 pages
- ISBN: 9780132599702 (0132599708)
- Publisher: Prentice Hall
- Author: Samir Palnitkar
About The Book
A complete Verilog HDL reference which progresses from the basic Verilog concepts to the most advanced concepts in digital design, from gate, RTL and behavioural modelling to timing simulation, switch level modelling, PLI and logic synthesis.
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